Weebit Nano has completed the design and verification stages of its embedded ReRAM module, and taped-out (released to manufacturing) a test-chip that integrates this module. This highly integrated test-chip will be used as the final platform for testing and qualification, ahead of customer production.
Commenting on Weebit’s on-schedule achievement of another key milestone, CEO Coby Hanoch said, “We implemented the module in an intelligent way, developing unique patent-pending analog and digital smart circuitry that significantly enhances the array’s technical parameters including speed, retention, and endurance.
The test chip containing this module will allow Weebit to demonstrate to customers a fully functional ReRAM product that can be readily integrated into their System-on-Chip and enable customers to accelerate their design process.”
According to Ross Teggatz, an industry veteran in analog/mixed-signal design and Co-Founder and CTO of Nebula Microsystems, “The engineering team at Nebula is known for its high-performance, highly-efficient analog mixed-signal designs. In various power management designs, ReRAM has the potential to enable tighter system integration and lower power consumption, even at high junction temperatures. We congratulate Weebit on taping out its ReRAM module design, which provides strong validation of the feasibility of this technology for the power domain.”
A memory module is a critical component when embedding a memory array in a System-on-Chip (SoC). It acts as the interface between the memory array and the rest of the system and includes the logic that controls the way the array is accessed.
The test chip comprises a full sub-system in which the module is embedded. It also includes a RISC-V microcontroller (MCU), system interfaces, Static Random-Access Memory (SRAM) and peripherals. Potential customers can use it as a development and prototyping platform for new products such as low-energy Internet of Things (IoT) devices.
Weebit’s new memory module is easily customisable and provides a foundation for the Company’s future ReRAM compiler, which will enable customers to automatically reconfigure the design according to their specific requirements without going through exhaustive manual design and fab qualification processes. The module will also be the basis for other ReRAM modules that Weebit will develop, tape-out and qualify at production fabs based on customer requests starting later this year.
The ReRAM module was designed in the ST 130nm process after interaction with potential customers showed it is the sweet spot for their analog, power, sensor and IoT designs. It includes a 128Kb ReRAM array, control logic, decoders, IOs (Input/Output communication elements) and error correcting code (ECC).
Weebit expects to have its first silicon of the embedded ReRAM module towards the end of this year. The Company plans to demonstrate the module and report functional testing results in the first quarter of 2022. Qualification of the module is expected by mid-2022.
