The ATM3 Series is a family of extreme low-power Bluetooth® 5 system-on-a-chip (SoC) solutions. This Bluetooth Low Energy SoC integrates a Bluetooth 5 radio with an ARM® Cortex® M0 processor and state-of-the-art power management to enable maximum lifetime in battery-operated devices.
The extremely low power ATM3 series SoC is designed with an extensive set of peripherals and flexible I/O to support a wide variety of applications across the consumer, commercial, and industrial Internet of Things (IoT) markets.
The ATM3 has an enhanced Power Management Unit that supports energy harvesting devices, multiple energy storage options and intelligent power distribution. The on-chip RF Energy Harvester has a dedicated antenna port and a separate input for energy from photovoltaic, mechanical, and thermal harvesting devices is also provided. Storage of harvested energy is facilitated through a separate port for connection of capacitive storage or a rechargeable battery.
With its ability to harvest energy from multiple sources and manage energy storage, the ATM3 is a flexible SoC solution for a wide range of consumer, commercial, and industrial products.
The ATM3 series is available in as a 40 pin QFN package (ATM3201/3202), 64 pin DR-QFN package (ATM3221), or 56-pin QFN(ATM3231). All package options support the same core set of features with the number of available I/O based on the package type.
An integrated Sensor Hub is a configurable hardware element that can read data from external sensors and write to memory while all other power domains remain powered down. The Sensor Hub can also trigger a full CPU wakeup if the sensor value falls outside pre-set thresholds.
An independent RF Wakeup Receiver is a separate RF receiver that scans for an incoming paging or wakeup signal while the rest of the SoC remains in a very low power state. The wakeup signal can be from a Bluetooth device, mobile phone, or a dedicated transmitter over a wide range of RF frequencies.
The ATM3 supports a wide range of peripherals through its I/O interface including UART, I2C, SPI, and Quad SPI for external flash. Also included is hardware for a Pulse Density Modulated (PDM) digital microphone, Pulse Width Modulation (PWM) outputs, Quadrature decoder (QDEC) for sensor inputs, Keyboard Scan Matrix Controller (KSM), Analog Comparator, and Application ADC. Flexible pin muxing routes peripherals to the I/O pins based on the application and product requirements.
