Atomera will present a paper and a poster at SISPAD 2026, applying its Mears Silicon Technology™ (MST®) Quantum Engineered Epitaxial Silicon platform to two distinct semiconductor device challenges, including a paper presentation on enabling next-generation 4F² DRAM transistors and a poster on reducing leakage in gallium nitride (GaN) on Silicon power devices.
Dr. Ilya Rumyantsev, Principal Engineer, TCAD Modeling, Atomera, will present an in-person poster entitled “Physics-Informed Compact Modeling of Off-State Leakage and Breakdown in GaN-on-Si Devices” (Room A3-A4): on Tuesday, September 29, 2026 at 4:00 p.m. to 6:00 p.m. KST.
The poster introduces a compact model of off-state leakage and breakdown in GaN-on-Si high-electron-mobility transistors (HEMTs). It compares devices built on conventional silicon, high-resistivity silicon, and Atomera’s MST-modified silicon.
The data show that the MST devices have lower low-voltage leakage and a delayed high-field current rise compared to the conventional control. High-resistivity silicon behaves differently, while interface measurements indicate that MST modifies the buried AlN/Si interface.
The model reproduces these behaviors, providing a practical framework for comparing process splits, localizing where leakage changes, and guiding further MST and GaN-on-Si development.
